[FE training-materials-updates] Kernel labs: start to move big code snippets out
Michael Opdenacker
michael.opdenacker at free-electrons.com
Tue Feb 4 17:13:15 CET 2014
Repository : git://git.free-electrons.com/training-materials.git
On branch : master
Link : http://git.free-electrons.com/training-materials/commit/?id=449cf9dfe414296b3a5ac0f7c9c127b7c71dfc63
>---------------------------------------------------------------
commit 449cf9dfe414296b3a5ac0f7c9c127b7c71dfc63
Author: Michael Opdenacker <michael.opdenacker at free-electrons.com>
Date: Tue Feb 4 17:11:01 2014 +0100
Kernel labs: start to move big code snippets out
- Using the \verbatiminput{} command ("verbatim" package)
- The goal is to provide download links to reduce typing work
- Links will be provided in a future commit
Signed-off-by: Michael Opdenacker <michael.opdenacker at free-electrons.com>
>---------------------------------------------------------------
449cf9dfe414296b3a5ac0f7c9c127b7c71dfc63
common/labs-header.tex | 1 +
labs/kernel-serial-iomem/kernel-serial-iomem.tex | 65 ++--------------------
labs/kernel-serial-iomem/uart-line-init.c | 12 ++++
labs/kernel-serial-iomem/uart-line-reset.c | 4 ++
labs/kernel-serial-iomem/uarts-pinctrl.dts | 16 ++++++
labs/kernel-serial-iomem/uarts.dts | 24 ++++++++
6 files changed, 61 insertions(+), 61 deletions(-)
diff --git a/common/labs-header.tex b/common/labs-header.tex
index afb6021..596f8fa 100644
--- a/common/labs-header.tex
+++ b/common/labs-header.tex
@@ -2,6 +2,7 @@
\usepackage{labs}
\usepackage{listings}
+\usepackage{verbatim}
\title{\labbooktitle \\ \vspace{1cm} Lab Book}
\trainingurl{\labbookurl}
diff --git a/labs/kernel-serial-iomem/kernel-serial-iomem.tex b/labs/kernel-serial-iomem/kernel-serial-iomem.tex
index 6ae1b76..667fa73 100644
--- a/labs/kernel-serial-iomem/kernel-serial-iomem.tex
+++ b/labs/kernel-serial-iomem/kernel-serial-iomem.tex
@@ -51,52 +51,11 @@ Now, open the \code{arch/arm/boot/dts/am335x-bone-common.dtsi}
file and create declarations for UART2 and UART4 in the pin muxing
section:
-\begin{verbatim}
- /* Pins 21 (TX) and 22 (RX) of connector P9 */
- uart2_pins: uart2_pins {
- pinctrl-single,pins = <
- 0x154 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* spi0_d0.uart2_tx, MODE 1 */
- 0x150 (PIN_INPUT_PULLUP | MUX_MODE1) /* spi0_sclk.uart2_rx, MODE 1 */
- >;
- };
-
- /* Pins 11 (RX) and 13 (TX) of connector P9 */
- uart4_pins: uart4_pins {
- pinctrl-single,pins = <
- 0x74 (PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* gpmc_wpn.uart4_tx, MODE 6 */
- 0x70 (PIN_INPUT_PULLUP | MUX_MODE6) /* gpmc_wait0.uart4_rx, MODE 6 */
- >;
- };
-\end{verbatim}
+\verbatiminput{../labs/kernel-serial-iomem/uarts-pinctrl.dts}
Then, declare the corresponding devices:
-\begin{verbatim}
- uartfe2: feserial at 48024000 {
- compatible = "free-electrons,serial";
- /* Tell the OMAP hardware power management that the block
- must be enabled, otherwise it's switched off
- Caution: starting counting at 1, not 0 */
- ti,hwmods = "uart3";
- clock-frequency = <48000000>;
- reg = <0x48024000 0x2000>;
- interrupts = <74>;
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&uart2_pins>;
- };
-
- uartfe4: feserial at 481a8000 {
- compatible = "free-electrons,serial";
- ti,hwmods = "uart5";
- clock-frequency = <48000000>;
- reg = <0x481a8000 0x2000>;
- interrupts = <45>;
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&uart4_pins>;
- };
-\end{verbatim}
+\verbatiminput{../labs/kernel-serial-iomem/uarts.dts}
Note: we are calling these devices with \code{uartfe} instead of
\code{uart} to avoid conflicts with declarations in
@@ -248,19 +207,7 @@ After these lines, let's add code to initialize the line
and configure the baud rate. This shows how to get a special
property from the device tree, in this case \code{clock-frequency}:
-\begin{verbatim}
- /* Configure the baud rate to 115200 */
-
- of_property_read_u32(pdev->dev.of_node, "clock-frequency",
- &uartclk);
- baud_divisor = uartclk / 16 / 115200;
- reg_write(dev, 0x07, UART_OMAP_MDR1);
- reg_write(dev, 0x00, UART_LCR);
- reg_write(dev, UART_LCR_DLAB, UART_LCR);
- reg_write(dev, baud_divisor & 0xff, UART_DLL);
- reg_write(dev, (baud_divisor >> 8) & 0xff, UART_DLM);
- reg_write(dev, UART_LCR_WLEN8, UART_LCR);
-\end{verbatim}
+\verbatiminput{../labs/kernel-serial-iomem/uart-line-init.c}
Declare \code{baud_divisor} and \code{uartclk} as \code{unsigned int}.
@@ -268,11 +215,7 @@ Declare \code{baud_divisor} and \code{uartclk} as \code{unsigned int}.
The last thing to do is to request a software reset:
-\begin{verbatim}
- /* Soft reset */
- reg_write(dev, UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT, UART_FCR);
- reg_write(dev, 0x00, UART_OMAP_MDR1);
-\end{verbatim}
+\verbatiminput{../labs/kernel-serial-iomem/uart-line-reset.c}
We are now ready to transmit characters over the serial ports!
diff --git a/labs/kernel-serial-iomem/uart-line-init.c b/labs/kernel-serial-iomem/uart-line-init.c
new file mode 100644
index 0000000..c23f976
--- /dev/null
+++ b/labs/kernel-serial-iomem/uart-line-init.c
@@ -0,0 +1,12 @@
+ /* Configure the baud rate to 115200 */
+
+ of_property_read_u32(pdev->dev.of_node, "clock-frequency",
+ &uartclk);
+ baud_divisor = uartclk / 16 / 115200;
+ reg_write(dev, 0x07, UART_OMAP_MDR1);
+ reg_write(dev, 0x00, UART_LCR);
+ reg_write(dev, UART_LCR_DLAB, UART_LCR);
+ reg_write(dev, baud_divisor & 0xff, UART_DLL);
+ reg_write(dev, (baud_divisor >> 8) & 0xff, UART_DLM);
+ reg_write(dev, UART_LCR_WLEN8, UART_LCR);
+
diff --git a/labs/kernel-serial-iomem/uart-line-reset.c b/labs/kernel-serial-iomem/uart-line-reset.c
new file mode 100644
index 0000000..63f5169
--- /dev/null
+++ b/labs/kernel-serial-iomem/uart-line-reset.c
@@ -0,0 +1,4 @@
+ /* Soft reset */
+ reg_write(dev, UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT, UART_FCR);
+ reg_write(dev, 0x00, UART_OMAP_MDR1);
+
diff --git a/labs/kernel-serial-iomem/uarts-pinctrl.dts b/labs/kernel-serial-iomem/uarts-pinctrl.dts
new file mode 100644
index 0000000..b4b85c4
--- /dev/null
+++ b/labs/kernel-serial-iomem/uarts-pinctrl.dts
@@ -0,0 +1,16 @@
+ /* Pins 21 (TX) and 22 (RX) of connector P9 */
+ uart2_pins: uart2_pins {
+ pinctrl-single,pins = <
+ 0x154 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* spi0_d0.uart2_tx, MODE 1 */
+ 0x150 (PIN_INPUT_PULLUP | MUX_MODE1) /* spi0_sclk.uart2_rx, MODE 1 */
+ >;
+ };
+
+ /* Pins 11 (RX) and 13 (TX) of connector P9 */
+ uart4_pins: uart4_pins {
+ pinctrl-single,pins = <
+ 0x74 (PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* gpmc_wpn.uart4_tx, MODE 6 */
+ 0x70 (PIN_INPUT_PULLUP | MUX_MODE6) /* gpmc_wait0.uart4_rx, MODE 6 */
+ >;
+ };
+
diff --git a/labs/kernel-serial-iomem/uarts.dts b/labs/kernel-serial-iomem/uarts.dts
new file mode 100644
index 0000000..bf868cd
--- /dev/null
+++ b/labs/kernel-serial-iomem/uarts.dts
@@ -0,0 +1,24 @@
+ uartfe2: feserial at 48024000 {
+ compatible = "free-electrons,serial";
+ /* Tell the OMAP hardware power management that the block
+ must be enabled, otherwise it's switched off
+ Caution: starting counting at 1, not 0 */
+ ti,hwmods = "uart3";
+ clock-frequency = <48000000>;
+ reg = <0x48024000 0x2000>;
+ interrupts = <74>;
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>;
+ };
+
+ uartfe4: feserial at 481a8000 {
+ compatible = "free-electrons,serial";
+ ti,hwmods = "uart5";
+ clock-frequency = <48000000>;
+ reg = <0x481a8000 0x2000>;
+ interrupts = <45>;
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart4_pins>;
+ };
More information about the training-materials-updates
mailing list